CNT arrays can make novel transisor

Electronic circuits use silicon for the components but has a limitation in its further reduction of size. Also silicon supply is expected to reduce in few years. Hence researchers are working on replacing silicon in electronic circuits by carbon nanotubes.
Carbon nanotubes
Carbon nanotubes are sheets of graphite rolled up to few nanometres in diameter. Because of their high-performance they are three times faster and consume only one-third the power than silicon devices. Single-walled carbon nanotubes can replace silicon in making thin-film transistors and high-performance logic devices due to their exceptional electronic and mechanical properties. Dense aligned arrays of carbon nanotubes can be made through techniques like chemical vapour deposition on crystalline substrates, however, they cannot compete with silicon-based devices for high-performance applications because of old fabrication techniques adopted.
A recent report indicates that a team at IBM TJ Watson Research Centre in New York has adopted Langmuir-Schaefer method to assemble semiconducting nanotube arrays with a surface density of more than 500 tubes/micron. It is also reported that transistors made using these nanotubes have record-breaking properties, with drive current densities of more than 120 µA/m, transconductances of greater than 40 µS/m and on/off ratios of more than 1000.
Using external electric fields or shear forces only low density arrays can be made and the current output from these arrays can in no way compare with semiconductors. But IBM researchers have developed a way to make dense arrays of single dimension nanomaterials, like single-walled carbon nanotubes or nanowires which can be scaled up to fabricate nanostructured arrays containing up of 99% semiconducting nanotubes on whole wafers.
Production of arrays
According to researchers nanotubes are dispersed on the surface of water and allowed to spread out to form a monolayer due to surface tension and orient themselves randomly. They are then compressed by the application of pressure to aligns them all in the same direction, with the pitch being self-limited by nanotube diameter.
IBM researchers are now busy improving the electrical contact between nanotube arrays and metal electrodes in the transistor devices they made. They are also looking at further optimizing the nanotube electronic type separation and reducing interface traps for making more uniform devices.


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